This invention relates generally to semiconductor devices and, more specifically, to a silicon wafer having a high quality denuded zone and to semiconductor devices formed thereon.
There are a number of semiconductor devices which are improved by being fabricated in semiconductor material having a high minority carrier lifetime. The current gain of a bipolar transistor, for example, is proportional to minority carrier lifetime. The refresh time of an MOS dynamic RAM, that is, the length of time the dynamic RAM retains memory without refresh, is also directly related to minority carrier lifetime. With such devices, of which these are but two examples, it is desirable or even necessary, therefore, to fabricate the device in a semiconductor wafer having at least a localized portion characterized by high minority carrier lifetime.
In addition, there are a number of semiconductor devices which further require or benefit from a region of low lifetime material proximate the high lifetime active device region. For example, low lifetime material lowers the recovery time of a bipolar switching transistor by suppressing the concentration of injected minority carriers. In a dynamic MOS circuit the nearby low lifetime material makes the circuit less sensitive to "soft" failures resulting from alpha particle generated minority carriers. The low lifetime material also suppresses parasitic currents (row disturb failures) which can cause faulty memory retention.
A localized region of low lifetime material has a further advantage if the low lifetime results from defects in the crystalline structure of the semiconductor material. During device processing these crystalline defects act as gettering sites for other defects and impurities and therefore aid in maintaining the high lifetime characteristic of the high quality material located nearby.
It is desirable, therefore, to have silicon wafers characterized by a surface layer of high lifetime material on a low lifetime bulk.
Techniques have been developed in an effort to achieve such silicon wafers having appropriate regions of high and low lifetimes. One such technique, for example, involves internal gettering at oxygen precipitates in the bulk of the wafer combined with denuding a surface layer of oxygen defects. To achieve the structure, silicon wafers are grown having a moderate to high concentration of interstitial oxygen. A surface layer is then denuded of oxygen related defects by heating the wafer in either an inert or an oxidizing ambient for a sufficient time for interstitial oxygen to diffuse to the wafer surface where it is removed from the wafer. Following the denuding step, oxygen is caused to precipitate in the bulk of the wafer by heating for an extended length of time at a temperature in the range of about 600.degree.-800.degree. C. While the foregoing process has proved partially successful in providing the desired structure, it has the shortcoming that it leaves a fairly high concentration of random defects in the surface layer. These defects, in turn, result in poor yield of devices fabricated on the wafers.
It is therefore an object of the present invention to provide an improved process for denuding a surface layer of a silicon wafer.
It is an another object of the invention to provide an improved process for preparing a silicon substrate for the fabrication of a semiconductor device.
It is yet another object of the invention to provide an improved semiconductor device.